MailScheduler.c

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#include "derivative.h"
#include "PIT.h"
#include "eDMA.h"
#include "MailDelivery.h"
#include "MailScheduler.h"
/* TEMP ERASE AFTER DEBUG */
#include "Compile_options.h"
/*
 ******************************************************************************
 * Constants
 ******************************************************************************
 */
/*
 ******************************************************************************
 * Globals
 ******************************************************************************
 */
vuint32_t gu32SchedTickCount;
vuint32_t gu32SchedTxDoneCount;
vuint8_t gu8RescheduleSource;
static uint32_t gu32SchedPITCount;
uint8_t gu8ReSchPITCh;
static uint8_t gu8SchedPITCh;
static uint8_t gu8SchedWriting;
/*
 ******************************************************************************
 * u8fnSchedConfig
 ******************************************************************************
 */
uint8_t u8fnSchedConfig(uint32_t u32PITCnt, uint8_t u8PITCh, 
                        uint32_t u32ReSchCnt, uint8_t u8ReSchPITCh)
{
  uint8_t u8Status;
  
  u8Status = CLEAR;
  
  /* Start by stopping any PIT count */
  vfnPITStart(u8PITCh, CLEAR);
  vfnPITStart(u8ReSchPITCh, CLEAR);
  
  /* Configure PIT for a periodical wake-up with ISRs need to switch mailboxes */
  u8Status = u8fnPITConfig(u8PITCh, u32PITCnt, TRUE);
  
  /* Prepare the Rescheduling channel as well */
  u8Status |= u8fnPITConfig(u8ReSchPITCh, u32ReSchCnt, TRUE);
  
  /* Continue only if successful */
  if(CLEAR == u8Status)
  {
    /* Restart whatever count we had before */
    gu32SchedTickCount = CLEAR;
    
    /* Remember the passed variables in our globals */
    gu32SchedPITCount = u32PITCnt;
    gu8SchedPITCh = u8PITCh;
    gu8ReSchPITCh = u8ReSchPITCh;
  }
  else
  {
    /* Nothing */
  }
  return (u8Status);
}
/*
 ******************************************************************************
 * u8fnSchedEnable
 ******************************************************************************
 */
uint8_t u8fnSchedEnable(uint8_t u8Enable)
{
  vfnPITStart(gu8SchedPITCh, u8Enable);
  
  /* We're starting - we need to init our writing permission */
  gu8SchedWriting = MAILBOX_WRITING_ALLOWED;
  
  return (CLEAR);
}
/*
 ******************************************************************************
 * u8fnSchedDSPIMailTransfer
 ******************************************************************************
 */
uint8_t u8fnSchedDSPIMailTransfer(uint8_t u8DSPIInstance,
                                  uint8_t u8CS,
                                  uint8_t u8ContCS,
                                  uint8_t u8EndOfQueueFlag,
                                  uint16_t* pu16MsgSrc,
                                  uint16_t* pu16MsgResponse,
                                  uint16_t u16Size)
{
  uint8_t u8Status;
  
  u8Status = MAILBOX_IS_BEING_WRITTEN;
  
  /* First, verify we can write */
  if(MAILBOX_WRITING_ALLOWED == gu8SchedWriting)
  {
    /* Lock */
    gu8SchedWriting = MAILBOX_WRITING_PROHIBITED;
    
    /* Start by appending the message to the outbox */
    u8Status = u8fnMailboxAppendToDSPIOutbox(u8DSPIInstance, u8CS, u8ContCS,
                                             u8EndOfQueueFlag, pu16MsgSrc,
                                             u16Size);
    if(CLEAR == u8Status)
    {
      /* Continue by preparing the pointer to the right location once we're done */
      u8Status = u8fnMailboxAppendToInbox(pu16MsgResponse, u16Size);
    }
    else
    {
      /* nothing, it's been taken care of */
    }
    
    /* Unlock */
    gu8SchedWriting = MAILBOX_WRITING_ALLOWED;
  }
  else
  {
    /* nothing, it's been taken care of */
  }
  return (u8Status);
}
/*
 ******************************************************************************
 * u8fnSchedCompositeDSPIMailTransfer
 ******************************************************************************
 */
uint8_t u8fnSchedCompositeDSPIMailTransfer(const uint8_t u8DSPIInstance1,
                                           const uint8_t u8DSPIInstance2,
                                           const uint8_t u8CS,
                                           uint16_t* pu16MsgSrc1,
                                           uint16_t* pu16MsgSrc2,
                                           const uint16_t* pu16MsgResponse,
                                           uint16_t u16SizeAtOrigin)
{
  uint8_t u8Status;
  uint16_t u16SizeAtDestination;
  uint16_t u16LastBufferAddress;
  
#ifdef DEBUGGING_NOW
//    SIU.GPDO[9].B.PDO = 1;
#endif
  u8Status = CLEAR;
  u16SizeAtDestination = u16SizeAtOrigin * 2u;
  
  /* First, verify we can write */
  if(MAILBOX_WRITING_ALLOWED == gu8SchedWriting)
  {
    /* Check that our outbox buffer size is capable of handling the message */
    if(gu8MailboxActiveOutboxOffset < OUTBOX_ACTIVE_OUTBOX_IS_2)
    {
      u16LastBufferAddress = (uint16_t)gu8MailboxActiveOutboxOffset
          + u16SizeAtDestination;
    }
    else
    {
      u16LastBufferAddress = (uint16_t)gu8MailboxActiveOutboxOffset
          + u16SizeAtDestination - OUTBOX_ACTIVE_OUTBOX_IS_2;
    }
    /* Only continue if we can complete the transaction */
    if(OUTBOX_MAX_BUFFER_CNT > u16LastBufferAddress)
    {
      
      /* Lock */
      gu8SchedWriting = MAILBOX_WRITING_PROHIBITED;
      
      /* What we want to do is send a complex message based out of two CITER */
      /* locations. We will prepare our outbox to do so by combining messages*/
      /* Status will always be clear because otherwise we wouln't have */
      /* gotten into this if case */
      (void)u8fnMailboxAppendToCompositeDSPIOutbox(u8DSPIInstance1,
                                                   u8DSPIInstance2, u8CS,
                                                   pu16MsgSrc1, pu16MsgSrc2,
                                                   u16SizeAtOrigin);
      
      /* Continue by preparing the pointer to the right location once we're done */
      u8Status
          = u8fnMailboxAppendToInbox(pu16MsgResponse, u16SizeAtDestination);
      
      /* Unlock */
      gu8SchedWriting = MAILBOX_WRITING_ALLOWED;
    }
    else
    {
      u8Status = MAILBOX_CAPACITY_HAS_BEEN_REACHED;
    }
  }
  else
  {
    u8Status = MAILBOX_IS_BEING_WRITTEN;
  }
#ifdef DEBUGGING_NOW
//  SIU.GPDO[9].B.PDO = 0;
#endif
  
  return (u8Status);
}
/*
 ******************************************************************************
 * u32fnSchedHasTimeElapsed
 ******************************************************************************
 */
uint32_t u32fnSchedHasTimeElapsed(uint32_t u32MyTickCount)
{
  uint32_t u32TimeDifference;
  
  /* Compare passed count with existing count */
  if(u32MyTickCount <= gu32SchedTickCount)
  {
    u32TimeDifference = gu32SchedTickCount - u32MyTickCount;
  }
  else
  {
    /* We have over-ran the counter. Still, this means */
    /* we're not in the same cycle. */
    u32TimeDifference = TRUE;
  }
  return (u32TimeDifference);
}
/*
 ******************************************************************************
 * u32fnSchedIsTxDone
 ******************************************************************************
 */
uint32_t u32fnSchedIsTxDone(uint32_t u32MyTxTime)
{
  uint32_t u32TimeDifference;
  
  /* Compare passed count with existing count */
  if(u32MyTxTime <= gu32SchedTxDoneCount)
  {
    u32TimeDifference = gu32SchedTxDoneCount - u32MyTxTime;
  }
  else
  {
    /* We have over-ran the counter. Still, this means */
    /* we're not in the same cycle. */
    u32TimeDifference = TRUE;
  }
  return (u32TimeDifference);
}
/*
 ******************************************************************************
 * vfnSchedIsr
 ******************************************************************************
 */
void vfnSchedIsr(void)
{
  /* Count */
  gu32SchedTickCount++;
  
  /* Force a SW isr */
  INTC.SSCIR[4].B.SET = TRUE;
  
  /*Trigger the appropriate DMA only if we have data */
  if((CLEAR != gau32DSPIOutbox[gu8MailboxActiveOutboxOffset])
      && (MAILBOX_WRITING_ALLOWED == gu8SchedWriting) 
      && (EDMA.TCD[gu8InactiveOutboxDMA].DONE == TRUE))
  {
    /* Switch Inbox and Outbox */
    vfnMailboxSwitchActiveMailboxes();
    
    vfnDMAMUXInit(gu8InactiveOutboxDMA, DMA_SOURCE_DSPI0_TX, CLEAR, TRUE);
    
    /* Trigger outbox through empty SPI Tx buffer */
    vfnMailDeliveryTriggerOutbox(gu8InactiveOutboxDMA, TRUE);
    
    /* Trigger inbox as well */
    EDMA.SERQR.R = gu8InactiveInboxDMA;
  }
  else
  {
    /* Don't trigger */
  }
  
  /* Clear flag that brought us here */
  PIT_CLEAR_FLAG(gu8SchedPITCh);
  
  return;
}
/*
 ******************************************************************************
 * vfnSchedInboxDoneIsr
 ******************************************************************************
 */
void vfnSchedInboxDoneIsr(void)
{
  /* This fn should be called after receiving all data */
   
  /* Clear BITER; CITER will be copied to it at launch */
  /* (just before becoming active)                     */
  EDMA.TCD[gu8InactiveOutboxDMA].BITER = CLEAR;
  vfnDMAMUXInit(gu8InactiveOutboxDMA, CLEAR, CLEAR, CLEAR);
  vfnDMAMUXInit(gu8InactiveInboxDMA, CLEAR, CLEAR, CLEAR);
  vfnDMAMUXInit(gu8InboxDMA, DMA_SOURCE_DSPI0_RX, CLEAR, TRUE);
  EDMA.CERQR.R = gu8InactiveInboxDMA;

  /* Once the outbox is empty, the DMA doesn't need to be triggered by */
  /* an empty SPI. Disable any MUX to any channel.                     */
  DMA_CLEAR_ISR_FLAG(gu8InactiveInboxDMA);
//  DMA_CLEAR_ISR_FLAG(gu8InboxDMA);
  
  /* Force Software ISRs to call any driver routines associated with having */
  /* mail delivered                                                         */
//  INTC.SSCIR[SCHED_INBOX_DONE_SW_ISR_1].B.SET = TRUE;
  INTC.SSCIR[SCHED_INBOX_DONE_SW_ISR_2].B.SET = TRUE;
  INTC.SSCIR[SCHED_INBOX_DONE_SW_ISR_3].B.SET = TRUE;
  INTC.SSCIR[SCHED_INBOX_DONE_SW_ISR_4].B.SET = TRUE;

  /* Increment the Isr count */
  gu32SchedTxDoneCount = gu32SchedTickCount;

  return;
}
/*
 ******************************************************************************
 * vfnReschedulerIsr
 ******************************************************************************
 */
void vfnReschedulerIsr(void)
{
  /* Call appropriate channels */
  INTC.SSCIR[SCHED_RESCHED_1].B.SET = 
    ((gu8RescheduleSource & RESCH_SRC_1) > CLEAR);
  INTC.SSCIR[SCHED_RESCHED_2].B.SET = 
    ((gu8RescheduleSource & RESCH_SRC_2) > CLEAR);
  INTC.SSCIR[SCHED_RESCHED_3].B.SET = 
    ((gu8RescheduleSource & RESCH_SRC_3) > CLEAR);
  
  if(gu8RescheduleSource == CLEAR)
  {
    /* End its life */
    /* Reschedule. Ch. 1 is for this Isr */
    vfnPITStart(gu8ReSchPITCh, CLEAR);
  }
  else
  {
    /* We will be back soon enough */
  }
  
  /* Clear Rescheduling flag */
  PIT_CLEAR_FLAG(gu8ReSchPITCh);
  
  return;
}

/*
 ******************************************************************************
 *
 *  End of file.
 *
 ******************************************************************************
 */